1. Field of the Invention
The present invention relates to a semiconductor memory device and, more specifically, it relates to an improvement in the arrangement of the memory cells and in the electrical connection structure.
2. Description of the Prior Art
A semiconductor memory device comprises capacitors in which information is stored, transistors which are switched by corresponding word lines for inputting (writing) and outputting (reading) information to and from the corresponding capacitors, and bit lines connected to the transistors for transmitting the information.
FIG. 1 shows a schematic plan view of a conventional dynamic memory device. FIG. 2 is a schematic cross sectional view taken along a line D--D in FIG. 1. In these figures, a source region 6a and drain regions 6b of transistors 6 are formed on a main surface of a silicon substrate 1 and capacitor regions 4a are provided adjacent to the drain region 6b. These regions are surrounded by an isolation region 7 and a channel cut 8 is formed below the isolation region 7. On channel regions 3a provided between the source region 6a and the drain regions 6b, word lines 3 are formed with corresponding gate insulating films 3b interposed therebetween. A capacitor electrode 9 is formed over the capacitor regions 4a with a capacitor insulating film 4b interposed therebetween. The area on which the capacitor electrode 9 is formed is shown by the hatching of broken lines in FIG. 1. These word lines 3 and the capacitor electrode 9 are covered with an insulating layer 10. A bit line 5 formed on the insulating layer 10 is connected through a contact hole 2 to the source region 6a which is common to the two transistors 6. Namely, the two capacitor regions 4a are connected to the one bit line 5 through the respective switching transistors 6 and the one contact hole 2.
As described above, in a conventional dynamic memory device, two memory cells are connected to one bit line through one contact hole, so that contact holes are required by half the number of the memory cells. Therefore, the area occupied by the many contact holes make it difficult to produce a highly integrated semiconductor memory device.